AFD4400 Digital Front End BSP

The AFD4400 Digital Front End SoC provides the complete end-to-end signal processing path and digital control functions required to implement single or multi-mode radios. The Linux BSP runs on an onboard ARM Cortex A9 processor, controls various peripherals and manages the signal processing firmware on the Vector Signal Processing Accelerator (VSPA) engine. It includes the u-boot bootloader and Linux kernel ported to the AFD4400. In addition to the SoC itself, the BSP supports various reference boards including the AFD4400EVB, AFD4400RDB, and the AFD4400 4T4R. There is driver support for the following blocks: Common Public Radio Interface (CPRI), JESD204 high-speed serial communication, and the Timebase Generator (TBGEN). There is a driver which controls communication between the ARM and the VSPA cores using a defined ARM-to-VSPA (AVI) command interface. There is also driver support for two different RF transceivers as well as JFFS support for a QSPI flash device. All of the drivers also have an accompanying userspace-level API library. Above all of the drivers sit a variety of test applications and configuration scripts.

The AFD4400 Digital Front End SoC provides the complete end-to-end signal processing path and digital control functions required to implement single or multi-mode radios. This Linux BSP runs on an onboard ARM Cortex A9 processor, controls various on-chip

Project Admins